Phase 1.07
I/O Communication Methods
Technical protocols for data exchange: PIO, Interrupts, and DMA.
How does a CPU actually talk to a device?
1. Programmed I/O (PIO)
The CPU is responsible for the entire transfer. It "polls" (checks) the device status repeatedly.
- Inefficient: CPU is busy waiting.
2. Interrupt-Driven I/O
The device signals the CPU when it's ready by sending an Interrupt.
- Efficient: CPU does other work until signaled. It then jumps to an ISR (Interrupt Service Routine).
3. Direct Memory Access (DMA)
A separate DMA Controller handles bulky data transfers between Disk and RAM without involving the CPU.
- Best for performance: CPU only sets up and is notified at completion.
4. Memory-Mapped I/O (MMIO)
Devices are assigned specific "memory addresses." Writing to address 0xABCD might actually send data to the GPU instead of RAM.
- Simplified: Uses the same instruction set for memory and I/O.
Technical Terms Breakdown
Polling
The process where the CPU constantly checks if a device is ready.
DMA Controller
Hardware that handles bulk data transfers independently of the CPU.
ISR
A specific set of code that runs in response to a hardware interrupt.
Input Device
Keyboard, Mouse, Scanner, Microphone.